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Sized Numbers In Verilog

The standard formal description of sized numbers in Verilog is <size>’<base format><number>.

  • Ø  <size> defines the size of the given number in bits.

  • Ø  <base format> defines the type of base of the given number. For example, the number may be in binary, hexadecimal or decimal form. For this we will write “b”, “h” or “d” respectively for binary, hexadecimal and decimal format.

  • Ø  <number> specifies the number. The number comprises of a string of characters taken from the set (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E and F).

Since  it might be difficult to write and read large number, verilog allows to place underscore (_) character in between the digits. The underscore can be placed any where except at  the first place. Underscore is ignored by the simulator. See the example below for clarification.

Note : The hexadecimal  alphabets (a, b, c, d, e, f) are not case sensitive. Spaces are allowed between the <size>, <base format> and <number>. The base format is not case sensitive, so it is valid to write “D” for decimal 
 instead of “d”.
 Example of a sized number in binary format:

z = 4’b1100;       // z is a sized four bit binary number.

Example of a sized number in hexadecimal format:

z = 8’hac;           // z is a sized 8 bit hexadecimal number.

Example of a sized number in decimal format:

z = 4’d16;          // z ia sized 4 bit decimal number.

Example of underscore to improve readability:

z = 12’b111_101_110_101;      // underscore placed is ignored by the simulator.